An image sensor may be a semiconductor device that converts an optical image into electrical signals. An image sensor may be classified into general categories of a charge coupled device (CCD) and a CMOS image sensor.
CMOS image sensors have gained popularity as a next generation image sensor. CMOS image sensors may overcome various disadvantages of the CCD.
The CMOS image sensor may sequentially detect an output of each unit pixel using MOS transistors. This may be done by providing as many MOS transistors as there are unit pixels on a semiconductor substrate using a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits.
That is, the CMOS image sensor may provide photodiodes and MOS transistors within a unit pixel and may sequentially detect an electrical signal of each unit pixel in a switching manner, to form an image.
A CMOS image sensor will be described with reference to the accompanying drawings.
FIG. 1 is an example circuit diagram of a 3T type CMOS image sensor.
Referring to FIG. 1, a unit pixel of a 3T CMOS image sensor may include photodiode (PD) for receiving light. Photodiode PD may convert the light into an electrical signal (photo-charge). The unit pixel of the 3T CMOS image sensor may further include three nMOS transistors T1, T2, and T3 to output the photo-charge generated at photodiode PD.
For example, a cathode of photodiode PD may be connected to a drain of first nMOS transistor T1 and a gate of second nMOS transistor T2.
Sources of first and second nMOS transistors T1 and T2 may be connected to a power line through which reference power VR may be supplied. A gate of first nMOS transistor T1 may be connected to a reset line through which a reset signal RST may be supplied.
A source of third nMOS transistor T3 may be connected to a drain of second nMOS transistor T2. A drain of third nMOS transistor T3 may be connected to a reading circuit (not shown) via a signal line. A gate of third nMOS transistor T3 may be connected to a selection line, for example a heat selection line, through which a selection signal SLCT may be supplied.
First nMOS transistor T1 may be called reset transistor Rx. Second nMOS transistor T2 may be called drive transistor Dx. Third nMOS transistor T3 may be called selection transistor Sx.
FIG. 2 is an example diagram illustrating a layout of a unit pixel of a 3T type CMOS image sensor.
Referring to FIG. 2, a unit pixel of the 3T type CMOS image sensor may include an active region 10. Photodiode 100 may be formed on a wide portion of active region 10. Gate electrodes 120, 130, and 140 of three transistors overlapping each other may be formed on the other portion of active region 10.
That is, reset transistor Rx may be formed by gate electrode 120. Drive transistor Dx may be formed by gate electrode 130. Selection transistor Sx may be formed by gate electrode 140.
Impurity ions may be implanted in portions excluding lower portions of respective gate electrodes 120, 130, and 140 in active region 10 of each transistor. Source/drain regions of each transistor may thus be formed.
Power voltage Vdd may be applied to source/drain regions between reset transistor Rx and drive transistor Dx. Source/drain regions on one side of selection transistor Sx may be connected to a reading circuit (not shown).
Although not shown in FIG. 2, gate electrodes 120, 130, and 140 may be connected to respective signal lines. Each of the signal lines may have a pad at one end and may be connected to an external driving circuit.
Three photodiodes, which may each have the above-descried construction, may constitute one pixel. For example, red, green, and blue color filters may be formed on three photodiodes, respectively, to constitute on pixel.
Photo sensitivity of the photodiode may increase as it receives a larger amount of light. Accordingly, increasing a fill factor of the photodiode may improve photo sensitivity. However, when the fill factor of the photodiode increases, a region of a driving circuit may correspondingly decrease. Therefore, there may be a limitation in increasing the fill factor of the photodiode.
Therefore, a microlens may be formed on the photodiode. It may be beneficial to improve a light-condensing efficiency of the microlens and to simply a process.
A dark current may exist in a CMOS image sensor, and may allow a photodiode to react as if it received light even in a region where there is no light. This may cause a refractory problem of generating a white pixel. That is, a white pixel may be generated due to this dark current.
This problem may be caused by an electron that may be generated in a defect existing in an upper interface of a semiconductor substrate where a photodiode may be formed. There may be a variety of methods for removing an electron having nothing to do with a signal existing in the interface.
Also, the dark current may be generated when undesired electrons are generated by an interface defect between an oxide layer of a shallow trench isolation (STI) layer and sidewalls of a photodiode.
A device isolation layer and a photodiode region in a related art CMOS image sensor will be described.
FIG. 3 is an example cross-sectional view illustrating a photodiode region of a related art CMOS image sensor.
Referring to FIG. 3, a related art CMOS image sensor may include device isolation layer 13, that may be formed in a device isolation region. Device isolation layer 13 may define an active region in a p-type semiconductor substrate 10. A plurality of photodiodes 11 may be formed within the active region of semiconductor substrate 10.
Interlayer insulating layer 14 may be formed over an entire surface of semiconductor substrate 10 including photodiodes 11. A plurality of metal lines may be formed in interlayer insulating layer 14.
R, G, and B color filters 15 that may realize a color image may be formed on interlayer insulating layer 14 in an upper portion of the photodiode region. Overcoat layer 16 may be formed on an entire surface of the substrate including color filters 15. Also, microlenses 17 may be formed on overcoat layer 16 on color filters 15.
Microlenses 17 may be obtained by coating a photoresist and patterning the photoresist such that photoresist patterns are left above photodiodes 11. A desired curvature of the microlenses 17 may be obtained by performing a reflow process on the photoresist, for example through baking.
Each microlens 17 may condense and/or direct incident light to a corresponding photodiode 11.
The photodiode region will be described below in additional detail in the related art CMOS image sensor having the above-described structure.
FIG. 4 is an example cross-sectional view of the related art photodiode region.
In general, a photodiode may have the following structure. A P-N junction may be formed so that a depletion region may be created in the P-N junction. Light may be received in the depletion region. If light is received in the depletion region, then an electron-hole pair may be created. The CMOS image sensor may only output an electron of the electron-hole pair as an image signal.
Referring to FIG. 4, in the related art CMOS image sensor, a device isolation region of a p-type semiconductor substrate 10 (that may be formed by growing a p-type epitaxial layer on a semiconductor substrate) may be etched to a prescribed depth and may form a trench. Device isolation layer 13 may be formed by filling the trench with an insulating layer, for example such as an oxide layer.
N-type impurity region 21 may be formed by implanting P or As ions in the active region. After that, p-type impurity region 22 may be formed by implanting p-type impurity ions in a surface of n-type impurity region 21.
P-type impurity region 22 may remove electrons that may be generated on a surface of semiconductor substrate 10 by forming the p-type impurity region having many holes on a surface of the semiconductor substrate. With this structure, electrons that may be created by a defect existing on a surface of semiconductor substrate 10 may move from the surface to the photodiode to generate an undesired signal. The created electrons that have moved to the photodiode may recombine with the holes of p-type impurity region 22, so that the electrons generated on a surface of semiconductor substrate 10 may be removed.
P-type impurity region 24 may be formed by implanting boron-based ions (e.g., B+ or BF2+) in sidewalls of device isolation layer 13, and may allow electrons existing on sidewalls of device isolation layer 13 to recombine with holes of p-type impurity region 24.
A method for forming p-type impurity region 24 will be described below.
FIGS. 5A and 5B are example cross-sectional diagrams illustrating a process for forming p-type impurity region 24 according to the related art.
Referring to FIG. 5A, photoresist layer pattern 30 (or a nitride layer pattern) may be formed on the p-type semiconductor substrate 10 such that device isolation region may be exposed. The device isolation region of semiconductor substrate 10 may be etched to a prescribed depth using, for example, a reactive ion etching (RIE) process, and may form trench 31.
Referring to FIG. 5B, p-type impurity region 24 may be formed in sidewalls of trench 31, for example by implanting boron-based ions (e.g., B+ or BF2+) in sidewalls of trench 31 using tilt ion implantation. A device isolation layer may be formed by filling the trench with an insulating layer such as an oxide layer as described above.
FIG. 6 is an example graph illustrating a concentration of boron measured along line I-I′ of FIG. 5B, and FIG. 7 is an example potential profile illustrating a problem of the related art CMOS image sensor.
P-type impurity region 24 may be formed in the sidewalls of device isolation layer 13. Electrons 50 generated by a sidewall defect of device isolation layer 13 may therefore mostly recombine with holes 55 and thus may be removed as illustrated in FIG. 6.
The above-described related art CMOS image sensor may have various problems. For example, referring to FIG. 7, since potential is high at n-type impurity region 21 of photodiode 11, a portion of electrons 50 generated by the sidewall defect of device isolation layer 13 may be dragged to the photodiode region, which may result in a high possibility of a dark current. A white pixel may be generated due to this dark current.